Analytical subthreshold current model of the dual-material tri-gate (DMTG) MOSFET and its application for subthreshold logic gate

Abstract Multi-gate MOSFETs are considered for realizing ultra-low-power circuits due to their superior channel control capability and short effect (SCE) resistance. To achieve this goal, it is necessary establish a suitable compact device circuit model them. However, current research focuses more on single-material multi-gate MOSFET, there no report dual-material logic gates. In work, we develop subthreshold tri-gate (DMTG) MOSFET. It found that the gate metal close source can affect characteristics of transistor greater extent. Moreover, combined with equivalent model, noise margin (NM) inverter composed DMTG developed. The nearly equal NM be obtained by design (END). An appropriate work function selected through END obtain optimal when designing inverter. under different geometric parameters given, simulation result shows accuracy reaches 98%. Finally, structure drain induced barrier lowering (DIBL) which effectively reduces DIBL 42%. These models still remain high length shrink down 20 nm, provide possibility MOSFET applied circuits.